(WINTER 2010)

An elective course in the Certificate Program in Embedded Systems Engineering.
Expand your knowledge of gate level modeling, data flow modeling, behavior modeling, advanced modeling techniques, test benches, and logic synthesis. Learn the essentials of the Verilog hardware description language, syntax , and practical design scenarios. Participants learn fundamental and advanced usage of Verilog as a design capture and simulation development tool, and the use of the Programming Language Interface (PLI). The course will emphasize how Verilog is used in each step of the design automation process. Prerequisite: Familiarity with digital logic design, electrical engineering, or equivalent experience. See enrollment confirmation for login information.

Tracy W. Fendley, M.S., senior digital engineer, at Covidien (Tyco Healthcare). Fendley is a member of the digital design group and has 10 years industry experience in the area of hardware design including analog, digital, and power systems. He has been involved in new product design, in-house test equipment development, test development, and project, schedule and budget management. His career experience includes working with all facets of product development: marketing, mechanical engineering, coordination, test development, and contract manufacturing.